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Chapter 9:
Symmetra UPS Subtraps
PowerNet MIB Reference Guide
87
SYMtrapstr49 Bit 24 of the Abnormal Condition register is set.
SYMtrapstr50 Bit 24 of the Abnormal Condition register has been reset.
SYMtrapstr51 Bit 25 of the Abnormal Condition register is set.
SYMtrapstr52 Bit 25 of the Abnormal Condition register has been reset.
SYMtrapstr53 Bit 26 of the Abnormal Condition register is set.
SYMtrapstr54 Bit 26 of the Abnormal Condition register has been reset.
SYMtrapstr55 Bit 27 of the Abnormal Condition register is set.
SYMtrapstr56 Bit 27 of the Abnormal Condition register has been reset.
SYMtrapstr57 Bit 28 of the Abnormal Condition register is set.
SYMtrapstr58 Bit 28 of the Abnormal Condition register has been reset.
SYMtrapstr59 Bit 29 of the Abnormal Condition register is set.
SYMtrapstr60 Bit 29 of the Abnormal Condition register has been reset.
SYMtrapstr61 Bit 30of the Abnormal Condition register is set.
SYMtrapstr62 Bit 30 of the Abnormal Condition register has been reset.
SYMtrapstr63 Bit 31 of the Abnormal Condition register is set.
SYMtrapstr64 Bit 31 of the Abnormal Condition register has been reset.
Subtrap Description (Sheet 3 of 3)
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